High‐performance and single event double‐upset‐immune latch design
نویسندگان
چکیده
منابع مشابه
High - energy heavy ion testing of VLSI devices for single event upsets and latch up
Several very large scale integrated (VLSI) devices which are not available in radiation hardened version are still required to be used in spacecraft systems. Thus these components need to be tested for highenergy heavy ion irradiation to find out their tolerance and suitability in specific space applications. This paper describes the high-energy heavy ion radiation testing of VLSI devices for s...
متن کاملSEL-UP: A CAD tool for the sensitivity analysis of radiation-induced Single Event Latch-Up
Space missions require extremely high reliable components that must guarantee correct functionality without incurring in catastrophic effects. When electronic devices are adopted in space applications, radiation hardened technology should be mandatorily adopted. In this paper we propose a novel method for analyzing the sensitivity with respect to Single Event Latch-up (SEL) in radiation hardene...
متن کاملLatch Design for Transient Pulse Tolerance
Previous work on radiation hardening has focused on designing memory elements to tolerate direct hits by high energy particles. The study of latch designs to tolerate high energy particle induced transient pulses arising in the combinational part of the circuit and traveling to the inputs of DFFs has been ignored. In this work, we look at ways to slow down the input stage of latches by insertin...
متن کاملA novel radiation hardened by design latch ∗
Due to aggressive technology scaling, radiation-induced soft errors have become a serious reliability concern in VLSI chip design. This paper presents a novel radiation hardened by design latch with high single-eventupset (SEU) immunity. The proposed latch can effectively mitigate SEU by internal dual interlocked scheme. The propagation delay, power dissipation and power delay product of the pr...
متن کاملA Single-phase Clock High-performance Bicmos Latch
A true single-phase clock BiCMOS latch intended for the use in high-performance deeply pipelined digital systems is proposed. It is based on quasi-complementary BiCMOS circuit, and uses single-phase clock. The speed and power performance of this latch are superior to previously published results, which has been shown by simulation in 0.8μm technology.
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Electronics Letters
سال: 2020
ISSN: 0013-5194,1350-911X
DOI: 10.1049/el.2020.1823